在数字电路理论中，组合逻辑电路（combinatorial logic或combinational logic）是一种逻辑电路，它的任一时刻的稳态输出，仅仅与该时刻的输入变量的取值有关，而与该时刻以前的输入变量取值无关。这种电路跟时序逻辑电路相反，时序逻辑电路的输出结果是依照目前的输入和先前的输入有关系。从电路结构分析，组合电路由各种逻辑门组成，网络中无记忆组件，也无反馈线。

组合逻辑是在电脑被用来做输入的信号跟保存的数据作逻辑代数运算之用。实际上电脑电路都会混用包含组合逻辑和时序逻辑的电路。举例来说，算术运算逻辑单元（ALU）中，尽管ALU是由循序逻辑的进程设备所控制，而数学的运算就是从组合逻辑制产生的。计算机中用到的其他电路，如半加器、全加器、半减器、全减器、数据选择器、数据分配器、编码器和译码器也用来构成组合逻辑电路。

In digital circuit theory, combinational logic (sometimes also referred to as time-independent logic ) is a type of digital logic which is implemented by Boolean circuits, where the output is a pure function of the present input only. This is in contrast to sequential logic, in which the output depends not only on the present input but also on the history of the input. In other words, sequential logic has memory while combinational logic does not.