MESI protocol
![MESI state diagram. PrRd = Processor Read - Read request from processor, PrWr = Processor Write - Write request from processor, BusRd = Bus - Read request from the bus without intent to modify. The 'S' denotes that the shared signal was asserted by another cache. BusRdX = Bus Read Exclusive - Read request from the bus with intent to modify. The transitions are labeled](/Images/godic/202501/27/Diagrama_MESI0926.GIF")
![Activity diagram of MESI protocol.](/Images/godic/202501/27/MESI_protocol_activity_diagram0926.png")
The MESI protocol (known also as Illinois protocol due to its development at the University of Illinois at Urbana-Champaign) is a widely used cache coherence and memory coherence protocol. It is the most common protocol which supports write-back cache.